Full Adder

Introduction

Full adder is a combinational circuit that performs arithmetic addition of three bits. Full adder takes 3 input and produces 2 outputs. Let x, y, z be the inputs and S ( sum ), C ( carry ) be the outputs.

Why we need only 2 outputs?

The maximum value that can be obtained by adding three bits is 3 ( when all three bits equals 1 ), which is a 2-bit number. S represents the least significant bit and C represents the most significant bit of the output.

0 + 0 + 0 = 00
0 + 0 + 1 = 01
0 + 1 + 0 = 01
0 + 1 + 1 = 10
1 + 0 + 0 = 01
1 + 0 + 1 = 10
1 + 1 + 0 = 10
1 + 1 + 1 = 11

Truth Table

K-Map

$\newline\\*S = \overline{x}\,\overline{y}\,z + \overline{x}\,y\,\overline{z} +x\,\overline{y}\,\overline{z} + x\,y\,z\newline\\*S = \overline{x}(\overline{y}\,z + y\,\overline{z}) +x(\overline{y}\,\overline{z} + yz)\newline\\*S = \overline{x}(y \oplus z) +x(\overline{y \oplus z})\newline\\*S = x \oplus y \oplus z$

$C = xz + xy + yz$

Implementation of Full Adder

Full Adder using AND, OR, NOT gates

Full adder using NAND gates

Minimum number of NAND gates required to implement full adder is 9.

Full adder using NOR gates

Minimum number of NOR gates required to implement full adder is 9.

Full adder using two half adder and one OR gate

Full adder using 4×1 Multiplexer

Full adder using 3×8 decoder

Applications

Full adders can be cascaded to implement an n-bit adder. For example, Carry Ripple Adder.
A full adder can be used as a subtractor using 2’s complement method,

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