**Introduction**

Half Subtractor is a combinational circuit that performs arithmetic subtraction of 2 bits. Half subtractor takes 2 inputs and produces 2 outputs. Let **x**, **y** be the inputs and **D** ( difference ), **B** ( borrow ) be the outputs.

**Why we use two outputs?**

The difference bit **D** tells us the difference between the two bits. Borrow bit **B** is used to check if a borrow is required or not. Borrow is only required if the result is negative.

For example, if we subtract 0 and 1 then the result is -1. In this case, the smaller number takes borrow. Since we are dealing with binary numbers only, talking borrow is equivalent to adding 2 to the number. Therefore, 0 becomes 2. The difference between 2 and 1 is 1. Thus, for “0-1” the difference bit **D** is 1, and the borrow bit **B** is also 1.

- 0 – 0 = 0
- 0 – 1 = 1 ( Borrow is required since the result is negative, B = 1 )
- 1 – 0 = 1
- 1 – 1 = 0

**Truth Table**

**K-Map**

**Implementation of Half-Subtractor**

**Half Subtractor using AND, OR, NOT gate**

**Half Subtractor using NAND gates**

Minimum NAND gates required to design a half subtractor is 5.

**Half Subtractor using NOR gates**

Minimum NOR gates required to design a half subtractor is 5.

**Half subtractor using 2×1 Multiplexer**

**Half Subtractor using 2×4 decoder**

**Read**